4
$\begingroup$

I have a list of quantum circuits called all_circuits. I tried to run those circuits on a quantum computer by submitting the jobs to the IBM job manager:

from qiskit.compiler import transpile, assemble
from qiskit.providers.ibmq.managed import IBMQJobManager

for i in range(len(all_circuits)):    # Submit a single job, and transpile everything just once. 
    all_circuits[i] = transpile(all_circuits[i],backend=backend)

I'm wondering after transpiling the whole list of circuit, is it still possible for me to modify an element in the transpiled list, like adding a gate at a particular place?

For instance, if each circuit in my list have the following elements (I'm not so sure if this is a good example haha):

qc = QuantumCircuit(3,3)
qc.H(0)
qc.crx(a,2,1) # Suppose a is some random parameter
***Here!***
qc.barrier()
qc.H([1,2])
qc.cx(1,3)
qc.measure(...)

I don't think that transpiling a circuit will mix the gates on the two sides of the barrier (the barrier will also be kept), so can I transpile all circuits first, then add a CNOT gate qc.cx(0,2) right before the barrier (marked as 'Here!') to each transpiled circuit, not original one ? Thanks!!

$\endgroup$
2
$\begingroup$

Yes. You can just add gates as usual.

For example: Suppose that we have the following random circuit

from qiskit.circuit.random import random_circuit
num_qubits = 2
circuit_depth = 3
max_operands = 1 #between 0 and 3
measurement_all_qubit = True
qc_random = random_circuit(num_qubits, circuit_depth, max_operands=max_operands, measure= None)
print(qc_random)

             ┌────────────┐       ┌────────────┐┌────────────┐
q_0: ────────┤ RZ(5.6174) ├───────┤ U1(5.5484) ├┤ RX(6.0937) ├
     ┌───────┴────────────┴──────┐├────────────┤├────────────┤
q_1: ┤ U3(0.96086,4.3412,1.4989) ├┤ RZ(4.7727) ├┤ U1(3.1479) ├
     └───────────────────────────┘└────────────┘└────────────┘

We can transpiled it to ibmq_athens to get:

from qiskit.compiler import transpile
provider = IBMQ.load_account()
Circuit_Transpile = transpile(qc_random, provider.get_backend('ibmq_athens') , optimization_level=3)
print(Circuit_Transpile)
               ┌────────────┐┌────┐┌────────────┐                    
      q_0 -> 0 ┤ RZ(2.1427) ├┤ √X ├┤ RZ(3.8622) ├────────────────────
               ├────────────┤├────┤├────────────┤┌────┐┌────────────┐
      q_1 -> 1 ┤ RZ(-3.245) ├┤ √X ├┤ RZ(4.3157) ├┤ √X ├┤ RZ(1.2987) ├
               └────────────┘└────┘└────────────┘└────┘└────────────┘
ancilla_0 -> 2 ──────────────────────────────────────────────────────
                                                                     
ancilla_1 -> 3 ──────────────────────────────────────────────────────
                                                                     
ancilla_2 -> 4 ──────────────────────────────────────────────────────
                                                                     

Now, we can just add additional gates on top of this transpiled circuit called "Circuit_Transpile" as you would normally do before. For example:

for i in range(5):
    Circuit_Transpile.h(i)
print(Circuit_Transpile)

               ┌────────────┐┌────┐┌────────────┐┌───┐                    
      q_0 -> 0 ┤ RZ(2.1427) ├┤ √X ├┤ RZ(3.8622) ├┤ H ├────────────────────
               ├────────────┤├────┤├────────────┤├───┴┐┌────────────┐┌───┐
      q_1 -> 1 ┤ RZ(-3.245) ├┤ √X ├┤ RZ(4.3157) ├┤ √X ├┤ RZ(1.2987) ├┤ H ├
               └───┬───┬────┘└────┘└────────────┘└────┘└────────────┘└───┘
ancilla_0 -> 2 ────┤ H ├──────────────────────────────────────────────────
                   ├───┤                                                  
ancilla_1 -> 3 ────┤ H ├──────────────────────────────────────────────────
                   ├───┤                                                  
ancilla_2 -> 4 ────┤ H ├──────────────────────────────────────────────────
                   └───┘                                                  

Hopefully this helps.


Update:

It seems like your circuit have two parts that is being divided by the circuit barrier, and you want to add gate into the middle of the circuit (after the barrier) after the transpilation process. If that is the case, then what you can do is to split the two parts of the circuit into two different circuits then compose them together after the transpilation process. For instance:

from qiskit.circuit.random import random_circuit
num_qubits = 2
circuit_depth = 3
max_operands = 1 #between 0 and 3
measurement_all_qubit = True
qc_random1 = random_circuit(num_qubits, circuit_depth, max_operands=max_operands, measure= None)
qc_random1.barrier(range(2))
qc_random2 = random_circuit(num_qubits, circuit_depth, max_operands=max_operands, measure= None)
qc_random2.barrier(range(2))
print(qc_random1)
print(qc_random2)

     ┌───┐ ┌────────────┐    ┌───┐      ░ 
q_0: ┤ X ├─┤ U1(2.7235) ├────┤ X ├──────░─
     ├───┤┌┴────────────┤┌───┴───┴────┐ ░ 
q_1: ┤ Z ├┤ RX(0.94815) ├┤ RX(2.0345) ├─░─
     └───┘└─────────────┘└────────────┘ ░ 
     ┌────────────────────┐    ┌───┐     ┌────────────┐ ░ 
q_0: ┤ U2(0.28027,1.7582) ├────┤ X ├─────┤ RZ(4.5689) ├─░─
     ├───────────────────┬┘┌───┴───┴────┐└───┬───┬────┘ ░ 
q_1: ┤ U2(1.6123,1.6426) ├─┤ RZ(6.1746) ├────┤ S ├──────░─
     └───────────────────┘ └────────────┘    └───┘      ░ 

Now, do the transpilation as you would have normally do:

from qiskit.compiler import transpile
provider = IBMQ.load_account()
Circuit_Transpile1 = transpile(qc_random1, provider.get_backend('ibmq_athens') , optimization_level=3)
Circuit_Transpile2 = transpile(qc_random2, provider.get_backend('ibmq_athens') , optimization_level=3)
print(Circuit_Transpile1)
print(Circuit_Transpile2)

               ┌────────────┐                                      ░ 
      q_0 -> 0 ┤ RZ(3.5597) ├──────────────────────────────────────░─
               └┬──────────┬┘┌────┐┌────────────┐┌────┐┌─────────┐ ░ 
      q_1 -> 1 ─┤ RZ(-π/2) ├─┤ √X ├┤ RZ(6.1242) ├┤ √X ├┤ RZ(π/2) ├─░─
                └──────────┘ └────┘└────────────┘└────┘└─────────┘ ░ 
ancilla_0 -> 2 ──────────────────────────────────────────────────────
                                                                     
ancilla_1 -> 3 ──────────────────────────────────────────────────────
                                                                     
ancilla_2 -> 4 ──────────────────────────────────────────────────────
                                                                     
global phase: 0.29049
                ┌───────────┐  ┌────┐┌────────────┐ ░ 
      q_0 -> 0 ─┤ RZ(3.329) ├──┤ √X ├┤ RZ(5.8595) ├─░─
               ┌┴───────────┴─┐├────┤├────────────┤ ░ 
      q_1 -> 1 ┤ RZ(0.071774) ├┤ √X ├┤ RZ(4.6453) ├─░─
               └──────────────┘└────┘└────────────┘ ░ 
ancilla_0 -> 2 ───────────────────────────────────────
                                                      
ancilla_1 -> 3 ───────────────────────────────────────
                                                      
ancilla_2 -> 4 ───────────────────────────────────────

Now, add gates that you wanted to add to the first circuit:

for i in range(2):
    Circuit_Transpile1.h(i)
print(Circuit_Transpile1)

               ┌────────────┐                                      ░ ┌───┐
      q_0 -> 0 ┤ RZ(3.5597) ├──────────────────────────────────────░─┤ H ├
               └┬──────────┬┘┌────┐┌────────────┐┌────┐┌─────────┐ ░ ├───┤
      q_1 -> 1 ─┤ RZ(-π/2) ├─┤ √X ├┤ RZ(6.1242) ├┤ √X ├┤ RZ(π/2) ├─░─┤ H ├
                └──────────┘ └────┘└────────────┘└────┘└─────────┘ ░ └───┘
ancilla_0 -> 2 ───────────────────────────────────────────────────────────
                                                                          
ancilla_1 -> 3 ───────────────────────────────────────────────────────────
                                                                          
ancilla_2 -> 4 ───────────────────────────────────────────────────────────

Then compose them together to formed a full circuit:

Circuit_Transpile1.compose(Circuit_Transpile2, inplace = True)
print(Circuit_Transpile1)

               ┌────────────┐                                      ░ ┌───┐»
      q_0 -> 0 ┤ RZ(3.5597) ├──────────────────────────────────────░─┤ H ├»
               └┬──────────┬┘┌────┐┌────────────┐┌────┐┌─────────┐ ░ ├───┤»
      q_1 -> 1 ─┤ RZ(-π/2) ├─┤ √X ├┤ RZ(6.1242) ├┤ √X ├┤ RZ(π/2) ├─░─┤ H ├»
                └──────────┘ └────┘└────────────┘└────┘└─────────┘ ░ └───┘»
ancilla_0 -> 2 ───────────────────────────────────────────────────────────»
                                                                          »
ancilla_1 -> 3 ───────────────────────────────────────────────────────────»
                                                                          »
ancilla_2 -> 4 ───────────────────────────────────────────────────────────»
                                                                          »
«                ┌───────────┐  ┌────┐┌────────────┐ ░ 
«      q_0 -> 0 ─┤ RZ(3.329) ├──┤ √X ├┤ RZ(5.8595) ├─░─
«               ┌┴───────────┴─┐├────┤├────────────┤ ░ 
«      q_1 -> 1 ┤ RZ(0.071774) ├┤ √X ├┤ RZ(4.6453) ├─░─
«               └──────────────┘└────┘└────────────┘ ░ 
«ancilla_0 -> 2 ───────────────────────────────────────
«                                                      
«ancilla_1 -> 3 ───────────────────────────────────────
«                                                      
«ancilla_2 -> 4 ───────────────────────────────────────
«                                                      
```
$\endgroup$
3
  • $\begingroup$ Thanks so much for the answer! In this case would that be possible for me to add the H gates in the middle of the circuit, like after the sqrt(x) gate? $\endgroup$
    – ZR-
    Feb 12 at 3:13
  • $\begingroup$ @Zhengrong I see. So you want to add the gates in the middle of the circuit, after the barrier, and not the end of the circuit, yes? I updated the answer. Hopefully it is what you are looking for. $\endgroup$
    – KAJ226
    Feb 12 at 4:51
  • $\begingroup$ Thanks, that helps!! $\endgroup$
    – ZR-
    Feb 12 at 5:19

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.