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I want to preface with a disclaimer that I am a physicist with minimal knowledge of computer hardware. I have a solid understanding of quantum information from a theoretical standpoint but zero knowledge of how it is implemented. Here goes...

When a company boasts that there newest chip has $X$ qubits, what exactly does that mean? Should I think of $X$ as being analogous with 32 or 64 bits on a conventional processor, meaning that the quantum computer can hold and process data types of size $X$? Or is $X$ something physical, like the number of Josephson junctions on the chip? should I think of $X$ as being equivalent to the number of transistors on a conventional processor? The benchmark of a conventional microprocessor is the number of transistors, so it is tempting to make the equivalence between transistor and qubit but I don't think that is correct because qubit is a unit of information and a transistor is a hardware thing. And furthermore I would not understand how quantum supremacy could be achieved with only ~50 qubits when conventional processors have billions of transistors. It just seems strange to say that a chip has $X$ 'qubits', because from a theoretical standpoint a qubit is information and not hardware.

EDIT:

I am realizing that my confusion boils down to memory vs processing power. I get that in order to store $2^X$ states, I would need $X$ physical qubits (Josephson junctions, spin states, etc). But then where does the processing power come from? On a conventional chip, you have registers to store the information to be processed, but then a ton of transistors to perform the computation. My question is how this processing power is measured in a quantum computer? Do the number of quantum gates on the chip really not matter as much as the number of qubits they are capable of operating on?

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  • $\begingroup$ "I have a solid understanding of quantum information from a theoretical standpoint" -- What do you mean by that? What do you know? Do you understand quantum algorithms? $\endgroup$ – Norbert Schuch Aug 17 '18 at 21:44
  • $\begingroup$ The "processing power" comes from gates, and you indeed need a lot of gates to implement a quantum algorithm; depending on an algorithm the number of gates can be polynomially greater than the number of qubits; with some problems you may find well-known memory-time tradeoff - using more qubits you may decrease the required number of gates. $\endgroup$ – kludg Aug 18 '18 at 6:50
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Take the tables attached in the Wikipedia article here:

https://en.wikipedia.org/wiki/List_of_quantum_processors

as a starting point. The "Gate model QPU's" are more likely to be Turing-complete than the "Annealing QPU's."

For companies that claim $X$ qubits, they mean they have they have the capability to operate, quantum mechanically, on $2^X$ states, and they are physically implemented qubits, e.g. $X$ Josephson junctions, etc., much like an individual bit on DRAM on a classical computer is physically implemented (with a capacitor and a transistor.)

So in a sense, the number of qubits is roughly analogous to the amount of hardware. We can only read out $X$ qubits, but we can operate on up to $2^X$ states. Your analogy is actually not that bad of an analogy, it's merely the quantum-mechanical weirdness that's hard to get over.

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  • $\begingroup$ Ok this pretty much clears things up. I am quite familiar with quantum weirdness (as much as one can be!) but I guess I need to stop thinking about quantum computers as adding machines like a normal computer lol. Thanks! $\endgroup$ – Jackson Aug 17 '18 at 17:52
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    $\begingroup$ But see my edit: I get that we can operate on $2^X$ states, but what hardware performs these operations? That is where my 64 bit memory vs 8 million transistor confusion come from. $\endgroup$ – Jackson Aug 17 '18 at 18:07
  • $\begingroup$ You very well likely know more about quantum weirdness than me. But to your edit, it's not like there's a NAND gate or an AOI gate (or better a CNOT gate or a controlled phase shift gate) on the theoretical QPU that enables it to perform Shor's algorithm (or Grover's, etc.) It's more that software executes the CNOT gate on the qubits. I don't know anything about how the software is implemented on a Josephson junction device, but it might be safe to say that the quantum processor is the physical qubits, and some other mechanism executes the quantum gates on these qubits. $\endgroup$ – Mark S Aug 17 '18 at 18:59
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When we take about hardware specs for classical computers, we are getting some information about the kind of things we can do with the device. For a circuit based quantum computer, the relevant number is how many fault-tolerant qubits we have. We can then computer this to the required qubit number for given instances of our favourite algorithm and see what that means in terms of factoring numbers, etc.

Currently, the number of fault-tolerant qubits is zero. We are instead in an era of noisy prototype devices. They are for testing, and what is possible depends strongly on how noisy the gates are and the connectivity (which pairs of qubits can we do a controlled gate with). If a company/lab does not give you information, there is no way to compare with what other companies/labs are doing (and all are currently a few orders of magnitude away from having enough noisy qubits to make a truly fault-tolerant qubit).

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I would say they have individual physical systems (represented by one qubit mathematically) that they interconnect together in some fashion way (so that is why we talk about connectivity). Physical systems can be two different polarization of a photon, or as two states of an electron... But there are multiple ways to have such systems.

Now quantum supremacy is a really bad word. So the idea is that the biggest number of qubits simulated on classical computers was around 50 qubits. So having a physical realization with a superior size would be considered as a "hope" for quantum computers to "beat" classical ones.

A good explanation video about it can be found here.

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