Are the other scheme besides the usual single syndrome qubit really useful, or they are only an academic research topic?
For computation on realistic hardware, we need to convert a logical circuit $C$ to a fault-tolerant circuit $C_{FT}$, where $C_{FT}$ has the same logical outcomes as the that of $C$ with high probability.
The high probability is ensured by demanding that $C_{FT}$ be designed in a way that errors on physical qubits don't propagate "too much".
Fault-tolerance for generic stabilizer codes
For generic stabilizer codes, if you use one syndrome qubit for each stabilizer measurement, the errors will propagate too much. Therefore it is quite necessary to use something like Shor or Steane's schemes to do the stabilizer measurements. These scheme ensure that errors don't propagate too much, and hence your overall circuit is fault-tolerant.
Fault-tolerance for topological codes
Topological codes have "local" stabilizer measurements. This means that you can get away with using one syndrome qubit per stabilizer measurement, if you order the $CX$ gates correctly. See the zig-zag pattern of abcd for surface codes:
One proof of this is that we do see reasonable fault-tolerance thresholds for topological codes under realistic noise models using the one-syndrome-qubit-per-stabilizer scheme.
Pros and cons
What are the differences between these schemes? What are the pros and cons of each scheme?
Suppose, we want to use some generic stabilizer code family and we decide to use one of Shor/Steane/Knill/flag-qubit scheme.
What are the metrics we should be looking at to compare these schemes? Given a $C$, what are the (a) depth and (b) width of the $C_{FT}$? And what is (c) the fault-tolerance threshold under realistic noise models?
I think the answers to (a) and (b) are quite easy to compute. See this paper by Gottesman that does a comparison
The answers to (c) are incomplete, and spread out across literature.