How can I determine if the error correction by estimated error results in a logical error in circuit-level noise?

Question

I am trying to simulate the logical error probability of color code under circuit-level noise.

In the code capacity noise and the phenomenological noise, the Pauli errors to the data qubits that occur with probability p are kept as a list (this is called actual error), and the information of the actual error is used to perform syndrome measurement, and the error is estimated by decoding from the obtained syndrome (this is called the estimated error). Then, the actual error and the estimated error are XORed, and if the resulting error is a logical operator, it is judged to be a logical error.

Now I want to calculate the logical error probability by the similar procedure with circuit-level noise. In this case, I understand the procedure for obtaining the estimated error, since it is almost the same as the phenomenological noise model, except that the syndrome measurement is performed by a syndrome measurement circuit. However, I do not know how to determine if the error correction by this estimated error results in a logical error. Is there a way to know actual errors in the same way as code capacity noise and the phenomenological noise? Also, I would like to know if there is a way to achieve this, especially in Stim.

Answer 1

This isn't really an answer to your question, but be aware you're making this a lot harder than it has to be by framing the problem this way. You want a simple prediction: was the observable flipped. Instead of asking the decoder to just give you this prediction, you're asking it for a complex ambiguous prediction of which circuit errors occurred. (Really it can only predict which equivalence classes of errors occurred, since many individual errors have exactly identical symptoms.) Then you're going to do a complex conversion into the simple prediction you wanted. Just ask for the simple prediction from the start!

This is the major reason stim has the concept of a detector error model: it abstracts away all the messy details of a circuit behind a tanner graph with labelled edges, and computing whether there is a logical error is a simple matter of adding up the labels from the chosen edges. I would strongly recommend doing all corrections via the detector error model rather than via the circuit. It's computationally cheaper and it's ultimately conceptually simpler.

Mapping back into the circuit picture is complicated! Only do it if you need to, e.g. if you need it in order to infer what physical error mechanisms are causing logical errors.