I want to transpile a circuit composed of CNOT and 1Q gates into Rzz, CNOT and 1Q gates such that the total number of 2Q gates is minimized. In the example below, I would like the three gates to be replaced with a single Rzz gate. However, just changing the basis gates in the transpiler pass throws an error (shown below). Any suggestions?

import qiskit as qs
from qiskit import QuantumCircuit

qc = QuantumCircuit(2)
qc.cx(1, 0)

qc_3 = qs.transpile(qc, basis_gates=['rzz','x', 'sx', 'rz'], optimization_level=3)


TranspilerError: "Unable to map source basis {('rz', 1), ('cx', 2)} to target basis {'sx', 'rzz', 'rz', 'x', 'reset', 'barrier', 'snapshot', 'delay', 'measure'} over library <qiskit.circuit.equivalence.EquivalenceLibrary object at 0x7faa11f85be0>."
{'qiskit-terra': '0.20.1', 'qiskit-aer': '0.9.1', 'qiskit-ignis': '0.6.0', 'qiskit-ibmq-provider': '0.18.1', 'qiskit-aqua': '0.9.5', 'qiskit': '0.32.1', 'qiskit-nature': None, 'qiskit-finance': None, 'qiskit-optimization': None, 'qiskit-machine-learning': None}

[EDIT] Upgrading the Qiskit package stops the error but is still unable to transpile the input circuit into a single Rzz.

{'qiskit-terra': '0.22.3', 'qiskit-aer': '0.11.2', 'qiskit-ignis': '0.6.0', 'qiskit-ibmq-provider': '0.19.2', 'qiskit': '0.39.4', 'qiskit-nature': '0.2.2', 'qiskit-finance': None, 'qiskit-optimization': None, 'qiskit-machine-learning': None}
  • $\begingroup$ I am not experiencing this error running that code in JupyterLab (presuming import qiskit as qs is also run), but it's still not transpiling into one RZZ at any optimization level. What environment are you using? $\endgroup$ Dec 14, 2022 at 3:25

1 Answer 1


Running the same code as yours gives me the following circuit for qc_3, with no errors:

enter image description here

My guess is that there is a version difference between my machine to yours. I use {'qiskit-terra': '0.22.3', 'qiskit': '0.39.4'}. Can you please check yours? (qiskit.__qiskit_version__).

  • $\begingroup$ Thanks! Upgrading the qiskit package stops throwing the error. However the transpiler is still not able to replace the initial circuit with a single Rzz gate. Any idea how to achieve that? Right now it is only decomposing each CX gate into Rzz gate individually $\endgroup$
    – Pranav M
    Dec 14, 2022 at 15:47

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