# Reasonable Circuit Depth

So I'm auto-constructing quantum circuits that are being auto-generated from dimacs files along with the addition of the amplification function. It's for a satisfiability problem where the number of variables is 9. I end up with a quantum circuit depth that is 6k-10k. The results that I'm getting at the end are always wrong after 3 the execution of 3 different circuits(8k shots each) on the Kolkota processor.

Getting to the question : Is it expected to always get wrong answers with such a depth or is the situation salvagable?

Under current state of development (decoherence times in range of hundred microseconds), it is impossible to run circuits with depth in range of thousands gates. My experience is that even circuits with depth around 200 could return almost perfectly uniform distribution of results. This means that the result is completely random due to decoherence effect.

However, it depends on algorithm you use. HHL algorithm (or any other using phase estimation and therefore many controlled gates) suffers from decoherence more than others. On the other hand QAOA or VQE run smoohtly even on current noisy hardware.

To sum it all up, on QPUs provided by IBM, the reasonable depth of circuits is in range of lower hundreds.

Currently, a reasonable circuit depth is 10-100 layers. Getting good results above 100 layers requires substantial effort, unless you're using a tiny number of qubits.

For scale, I think so far the largest quantum computations that have been published are "Quantum supremacy using a programmable superconducting processor" and "Suppressing quantum errors by scaling a surface code logical qubit". The former applied ~40 layers of gates to 53 qubits, and achieved a sample fidelity of around 0.1%. The latter applied ~250 layers of gates to 49 qubits and achieved a logical fidelity of around 20%.

Beware that this sounds like the fidelity improved massively from one paper to the other, but they are measuring different things. The error correction experiment only has one final output bit, and is dedicating the whole machine to protecting that bit's qubit. Another misleading thing here is that just saying "layers" masks the fact that the error correction paper has many more measurement layers, which take hundreds of nanoseconds instead of tens of nanoseconds.

In both cases the fidelity drops exponentially with number of layers. At a thousand layers the fidelity of the random circuit sampling paper would have been less than 0.00000000000000000000000000000000000000000000000000000000000001%, also known as "super duper indistinguishable from noise", while the error correction experiment would have been at 0.2%. By ten thousand layers the error correction experiment would also be indistinguishable from noise.

For back of the envelope estimates, note that a really good gate error rate is 0.1% and a more typical error rate is 1%. If $$0.99^{\text{qubits} \cdot \text{layers}}$$ is a small number, you're gonna have a rough time. You will need strategies to deal with the errors that will inevitably be occurring.

PS: Ion traps can probably do circuits with thousands of layers, if you make those layers sparse. This is because ion traps can idle their qubits very effectively, so what matters isn't layers it's total gates. Be careful comparing across architectures.