Like we all probably know, today’s NISQ computers are, as their name implies - very noisy. Hence, if we desire to obtain valuable results then we should come up with circuit designs that minimizes the expected errors to an accepted level we can handle with.
It seems to me that it’s possible to compute an expected error rate for a specific circuit design given some characterization data (T1, T2, gate error rates, measurement error rates..). But I haven't saw any practical example of this so far.
The question is - are there any systematic tools to asses an expected overall error rate when running a specific circuit on a specific quantum computer?