I am implementing a Carry Select Adder, the problem is that the circuit is quite complex to translate in Qiskit.
I need to use one (or multiple) line(s) as input for two (or more) gates.
In particular, given two Reversible Full Adder (RFA) gates both use the qubits A0 and B0, but with different carry in input. If I simply put them in series the second RFA would take as input the output of the first.
I came up with the solution of placing them in parallel by using a copy of the lines A0 and B0 for the second one but I don't like it and maybe there's a more elegant design that I can use.
Graphically, what I would like:
What I came up with: