One of the main ideas introduced in Giovannetti et al. 2007 (0708.1879) is the so-called bucket-brigade (q)RAM architecture.
The authors state (first paragraph, second column, first page, in v2) that this new (at the time) (q)RAM architecture reduces the number of switches that must be thrown during a RAM call, quantum or classical, from $O(N^{1/d})$ to $O(\log N)$, where $N=2^n$ is the number of memory slots in the RAM and $d$ is the dimension of the lattice that, according to the authors, conventional RAM architectures use for memory retrieval.
The conventional architecture they have in mind essentially consists in retrieving the information using a tree structure, like the one they present in their Fig. 1 (here reproduced):
They say that this scheme requires to throw $O(N)$ switches for each memory call, but I don't understand why is this the case. From the above, it would seem that one just needs to throw $O(\log_2(N))$ switches, one per bifurcation, to get from the top to the bottom.
I understand that in the quantum case, with this protocol, we would end up with a state correlated with all of the $N$ switches, but they seem to be stating that even in the classical case one needs to activate them all.
In other words, is the advantage of the bucket-brigade approach only in the higher error resilience in the quantum case, or would it also be classically advantageous, compared with the conventional approaches?