I am trying to understand the general process of error correction.

E.g. I have a few physical qubits encoded as a logical qubit $\vert0\rangle_L = \vert 0 0 0...0\rangle$. What is the process of error correction if I want to apply, say, one $X$ gate to my logical qubit?

  1. Apply $X$ gate on logical qubit $\vert0\rangle_L$.

    $\Rightarrow$ $X$ gate is applied on the underlying physical qubits $ \vert 0 0 0...0\rangle$.

  2. Error correction algorithm is applied and corrects errors (if any).

Is this process repeated until every gate of the quantum circuit has been applied? Or how often is the error correction algorithm applied?


1 Answer 1


That basically depends on your error rate. You want to perform error correction as infrequently as possible while still having a tolerably small failure probability for the error correction (because too many errors have happened since the last correction).

For theoretical purposes, such as calculation of fault-tolerant thresholds, it is quite common to imagine that one round of error correction happens after each and every logical gate.

  • $\begingroup$ Interesting mindset. I always think in terms of wanting to error correct as often as possible, because it effectively lowers the error rate. Also you're typically error correct while performing gates to do them fault tolerantly. E.g. in the surface code you do CNOTs topologically by adjusting which stabilizers you're repeatedly measuring. $\endgroup$ Oct 4, 2021 at 20:46
  • $\begingroup$ @CraigGidney I agree that in near-term devices we need to get the error rate as low as possible and so you will error correct as often as possible. That's because the error rate is relatively high. Once we have surpassed a fault-tolerant threshold, however, you don't need to do it quite so often, and your circuits will start to become somewhat more efficient, given that most of the resources are consumed by error correction (or maybe you just get rid of one order of concatenation in a concatenated code. I don't know what will be better). $\endgroup$
    – DaftWullie
    Oct 5, 2021 at 6:53
  • $\begingroup$ It probably depends on context. For superconducting qubits, where idle error is essentially identical to gate error, the less time you wait between rounds of error correction the less time there is for the qubits to dephase and decay. Going faster lowers the error accrued per round, which is hugely beneficial at the physical layer, so you want to go as fast as possible. For example, during a twist based S gate, it's conceivable that logical errors coming from the single round containing the transversal swap could outweigh the other 60 rounds because that one round has more error per round. $\endgroup$ Oct 5, 2021 at 7:59
  • $\begingroup$ I haven't checked that S gate thing by the way, but I intend to sometime over the coming year. Would be much better to have a quantitative number instead of just a hunch it could be problematic, of course. $\endgroup$ Oct 5, 2021 at 8:00

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