In Nielsen and Chuang, there's the following paragraph:
The Toffoli gate can be used to simulate NAND gates and can also be used to do FANOUT. With these two operations, it becomes possible to simulate all other elements in a classical circuit, and thus an arbitrary classical circuit can be simulated by an equivalent reversible circuit.
I'm confused about why FANIN isn't required to be able to simulate all other elements in a classical circuit, while FANOUT is required?
Also, a side note/question, I originally posted this question on the Electrical Engineering SE, but it was suggested to be migrated to this SE as it seems to them that "fan-in" and "fan-out" from a EE perspective is very different from FANOUT and FANIN in the context of Toffoli Gates. I learned "fan-in" and "fan-out" from EE perspective and just assumed the FANOUT discussed in Nielsen and Chuang is the exact same thing. Am I mistaken and "fan-in" and "fan-out" in QC is different from that in EE?