Why can two target superconducting processors with the same layout get different transpilation results?

Question

I compile and run the same small Grover circuit for 6 different processors.

ibmq_santago, manila and bogota all have a linear layout, while quito, belem and lima have qubits arranged in a T-shape.

I get transpiled circuits using transpile(circuit, backend=target_backend, seed_transpiler=10, optimization_level=3). I expected the resulting circuits to have the same structure for processors with the same layout. However, they do differ. For ex. circuit for Santiago has depth of 73 and includes 38 cX gates, while one for Manila has depth of 70 but with 41 cX gates. There are similar differences between other processors.

I thought it could be due to some randomness inside of the code, but the results always return the same. Does the Qiskit transpiler take into account average errors or other parameters that could affect this?

Answer 1

The maximum optimization level (level 3) is noise-aware. That means that considers the noise reported by the backend to allocate qubits and tries to maximise fidelity. As a consequence, transpiling for different backends might end up with different allocations.

From the level 3 passmanager documentation (emphasis mine):

Level 3 pass manager: heavy optimization by noise adaptive qubit mapping and gate cancellation using commutativity rules and unitary synthesis.