# Physical implementation of gates on IBM Q

There is a lot of quantum gates in IBM Q Composer, however, only few are implemented physically while others can be composed of them.

When one looks at description of a quantum processor in IBM Q interface, there is a list of basis gates. For example those are id, u1, u2, u3, cx for Melbourne processor. However, gates $$I$$, $$U1$$ and $$U2$$ are special cases of $$U3$$. If one removes statement include "qelib1.inc"; from QASM code, only $$CNOT$$ and $$U3$$ gates are left. So, it seems that all single qubit gates are implemented with $$U3$$ and there is of course two qubits $$CNOT$$.

According to IBM Q manual, $$U3$$ gate is implemented by three frame changes and two $$X_{\pi/2}$$ pulses.

My questions are these:

1. Which gates are implemented physically on IBM Q? I would expect $$CNOT$$ and some single qubit gates but which ones?
2. What are frame changes and $$X_{\pi/2}$$ pulses used for gate implementation?

In this paper they talk primarily about ibmqx4.

The gates listed in Eq. (26) are provided by IBM for the user’s convenience. However these are not the gates that are physically implemented by their quantum computer. IBM has a compiler that translates the gates in (26) into products of gates from a physical gate set. The physical gate set employed by IBM is essentially composed of three gates [1]: {U1(λ), RX (π/2), CNOT} .

It seems that the link [1] from the paper is broken but I was able to find this, which is device information of IBM Q 16 Rueschlikon ibmxq5 (formerly ibmqx3)
They mention:

A frame change (FC) is equivalent to applying a virtual Z-gate in software, where Z(θ)=FC(-θ). Gaussian derivative (GD) and Gaussian flattop (GF) pulses are defined with amplitude and angle parameters.

Summary:

1. I believe in the IBM Q Experience platform, the term "basis gates", which you can find in each backend's specification, refers to the implemented physical gates on that specific device.
So for Melbourne we'll have id, u1, u2, u3, cx.
This should be confirmed by someone from IBM Q team though, but I think physical gates, native gates and basis gates are interchangeable terms.
2. The above image should explain your second question.